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Designing the instruction set for my TTL CPU

James Stanley · published 31 January 2021

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Host
https://en.wikipedia.org/wiki/ENIAC
en.wikipedia.org
https://en.wikipedia.org/wiki/EDSAC
en.wikipedia.org
https://clrhome.org/table/
clrhome.org
https://stackoverflow.com/a/9739105
stackoverflow.com
https://github.com/jes/ttl-cpu/blob/master/asm/mk-table-html
github.com
https://www.nand2tetris.org/project04
nand2tetris.org
https://github.com/jes/ttl-cpu/blob/master/ucode/ucode.s
github.com
https://github.com/jes/ttl-cpu/blob/master/doc/UCODE.md
github.com
https://github.com/jes/ttl-cpu/blob/master/ucode/uasm
github.com
https://github.com/jes/ttl-cpu/blob/master/doc/ALU.md
github.com
https://www.youtube.com/watch?v=LA_DrBwkiJA
youtube.com
https://github.com/jes/ttl-cpu/blob/master/bootrom.s
github.com
https://github.com/jes/ttl-cpu/blob/master/cpu_tb.v
github.com
https://github.com/jes/ttl-cpu/blob/master/verbose_tb.v
github.com
https://github.com/jes/ttl-cpu/blob/master/run-tests.sh
github.com
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