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Record · corpus.blog/posts/01a08219-df31-7137-bf84-8a9437093133

Gathering Intel on Intel AVX-512 Transitions

Travis Downs · published 17 January 2020

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Read the post at travisdowns.github.io Wayback capture
4blogs citing
First cited
30 Jan 2020
Most recent
16 Jan 2026
Rank this month
not ranked
External links
31
Words captured
8,389

Cited by

Blog
In the post
Date
bgslabs.org
The Evolution of x86 SIMD: From SSE to AVX-512 Read at the source ↗
16 Jan 2026
old.chipsandcheese.com
Zen 5’s AVX-512 Frequency Behavior Read at the source ↗
1 Mar 2025
old.chipsandcheese.com
Addendum: Clock Ramp on ADL, Zen 4, M1, and More Read at the source ↗
26 Oct 2022
medawsonjr
Beginner’s Mindset: Key to Engineering Expertise Read at the source ↗
11 Oct 2022
olegkarasik.wordpress.com
.NET R&D Digest (January, 2020) Read at the source ↗
30 Jan 2020

Links from this post

Link
Host
https://blog.cloudflare.com/on-the-dangers-of-intels-frequency-scaling/
blog.cloudflare.com
AVX-512: when and how to use these new instructions Read at the source ↗
lemire.me
https://github.com/travisdowns/freq-bench/tree/post1
github.com
https://github.com/travisdowns/freq-bench/blob/post1/README.md
github.com
https://github.com/travisdowns/freq-bench/blob/post1/scripts/data.sh
github.com
https://github.com/travisdowns/freq-bench/blob/post1/scripts/plots.sh
github.com
https://stackoverflow.com/a/56861355/149138
stackoverflow.com
https://ark.intel.com/content/www/us/en/ark/products/88967/intel-core-i7-6700hq-processor-6m-cache-up-to-3-50-ghz.html
ark.intel.com
https://uops.info/table.html?search=vpord%20(zmm%2C%20zmm%2C%20zmm
uops.info
https://github.com/travisdowns/freq-bench/blob/434c7cf5db73e2d48061e78525c7bbf7eb7757a3/basic-impls.cpp
github.com
https://lemire.me
lemire.me
https://twitter.com/thekanter
twitter.com
http://www.realworldtech.com
realworldtech.com
https://twitter.com/JeffSmith888
twitter.com
https://news.ycombinator.com/item?id=22077974
news.ycombinator.com
https://twitter.com/trav_downs/status/1218238653354344449
twitter.com
https://lobste.rs/s/qaqmyo/gathering_intel_on_intel_avx_512
lobste.rs
AVX-512 throttling: heavy instructions are maybe not so dangerous Read at the source ↗
lemire.me
The dangers of AVX-512 throttling: a 3% impact on Xeon Gold processors? Read at the source ↗
lemire.me
Trying harder to make AVX-512 look bad: my quantified and reproducible results Read at the source ↗
lemire.me
Per-core frequency scaling and AVX-512: an experiment Read at the source ↗
lemire.me
https://en.wikichip.org/wiki/intel/xeon_w/w-2104
en.wikichip.org
https://twitter.com/JeffSmith888/status/1211821823035351043
twitter.com
https://www.realworldtech.com/forum/?threadid=179358&curpostid=179652
realworldtech.com
https://github.com/travisdowns/avx-turbo
github.com
https://stackoverflow.com/q/41303780/149138
stackoverflow.com
Sushi Roll: A CPU research kernel with minimal noise for cycle-by-cycle micro-architectural introspection Read at the source ↗
gamozolabs.github.io
https://encycolorpedia.com/ffdab9
encycolorpedia.com
https://stackoverflow.com/q/45472147/149138
stackoverflow.com
https://encycolorpedia.com/d8bfd8
encycolorpedia.com
https://stackoverflow.com/a/45592838/149138
stackoverflow.com