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"2008-04-02T07:00:00+00:00" }, { "id": "01a0dcec-79f9-705e-8ff0-603e109bb9f3", "title": "ISSCC 2008 Cell Processor Update", "url": "https://www.realworldtech.com/cell-shrink/", "published_at": "2008-02-25T08:00:00+00:00" }, { "id": "01a0dcec-79f9-705e-8ff0-603e10ae60e8", "title": "Process Technology Advancements at IEDM 2007", "url": "https://www.realworldtech.com/iedm-2007/", "published_at": "2008-01-16T08:00:00+00:00" }, { "id": "01a0dcec-79f9-705e-8ff0-603e11175712", "title": "ISSCC 2008 Preview: Silverthorne, Rock, Tukwila and More", "url": "https://www.realworldtech.com/isscc-2008-preview/", "published_at": "2007-12-05T08:00:00+00:00" }, { "id": "01a0dcec-79f9-705e-8ff0-603e1208dd9a", "title": "Rambus Sets the Bandwidth Bar at a Terabyte/Second", "url": "https://www.realworldtech.com/terabyte-intiative/", "published_at": "2007-12-03T08:00:00+00:00" }, { "id": "01a0dcec-79f9-705e-8ff0-603e12a6bcc7", "title": "Harpertown Performance Preview", "url": "https://www.realworldtech.com/harpertown-review/", "published_at": "2007-11-09T08:00:00+00:00" }, { "id": "01a0dcec-79f9-705e-8ff0-603e139405da", "title": "The Common System Interface: Intel’s Future Interconnect", "url": "https://www.realworldtech.com/common-system-interface/", "published_at": "2007-08-28T07:00:00+00:00" }, { "id": "01a0dcec-79f9-705e-8ff0-603e145360d8", "title": "AMD’s Griffin Flies to the Fore", "url": "https://www.realworldtech.com/amd-griffin/", "published_at": "2007-06-04T07:00:00+00:00" }, { "id": "01a0dcec-79f9-705e-8ff0-603e1462da84", "title": "Inside Barcelona: AMD’s Next Generation", "url": "https://www.realworldtech.com/barcelona/", "published_at": "2007-05-16T07:00:00+00:00" }, { "id": "01a0dcec-79f9-705e-8ff0-603e146b725e", "title": "3D Integration: A Revolution in Design", "url": "https://www.realworldtech.com/3d-integration/", "published_at": "2007-05-02T07:00:00+00:00" }, { "id": "01a0dcfb-7a1b-71ff-9e01-d46f377a002b", "title": "ISSCC 2007: Intel’s Teraflops Design", "url": "https://www.realworldtech.com/terascale/", "published_at": "2007-04-03T07:00:00+00:00" }, { "id": "01a0dcfb-7a1b-71ff-9e01-d46f377d6400", "title": "ISSCC 2007: A Brief Survey", "url": "https://www.realworldtech.com/isscc-2007-survey/", "published_at": "2007-03-26T07:00:00+00:00" }, { "id": "01a0dcfb-7a1b-71ff-9e01-d46f3851cbe1", "title": "Intel’s 45nm Surprise: High-k Dielectrics and Metal Gates", "url": "https://www.realworldtech.com/intel-45nm-hkmg/", "published_at": "2007-01-27T08:00:00+00:00" }, { "id": "01a0dcfb-7a1b-71ff-9e01-d46f386e5cf9", "title": "An Introduction to Multiprocessor Systems", "url": "https://www.realworldtech.com/coherency/", "published_at": "2006-12-11T08:00:00+00:00" }, { "id": "01a0dcfb-7a1b-71ff-9e01-d46f3962b4d0", "title": "Clovertown Performance Preview: Rise of the Quad Core", "url": "https://www.realworldtech.com/clovertown-review/", "published_at": "2006-11-14T08:00:00+00:00" }, { "id": "01a0dcfb-7a1b-71ff-9e01-d46f3a3b11c0", "title": "Performance Per Watt: Dempsey and Woodcrest", "url": "https://www.realworldtech.com/woodcrest-power/", "published_at": "2006-11-07T08:00:00+00:00" }, { "id": "01a0dcfb-7a1b-71ff-9e01-d46f3af2f36b", "title": "Fall Processor Forum 2006: IBM’s POWER6", "url": "https://www.realworldtech.com/power6-mpf/", "published_at": "2006-10-16T07:00:00+00:00" }, { "id": "01a0dcfb-7a1b-71ff-9e01-d46f3bcd9ace", "title": "Niagara II: The Hydra Returns", "url": "https://www.realworldtech.com/niagara2/", "published_at": "2006-09-04T07:00:00+00:00" }, { "id": "01a0dcfb-7a1b-71ff-9e01-d46f3c3dbaa0", "title": "Performance Analysis Tools: A Look at VTune", "url": "https://www.realworldtech.com/vtune/", "published_at": "2006-08-06T07:00:00+00:00" }, { "id": "01a0dcfb-7a1b-71ff-9e01-d46f3cfa4558", "title": "Notes on the Montecito Launch", "url": "https://www.realworldtech.com/montecito-launch/", "published_at": "2006-07-25T07:00:00+00:00" } ] posts Claim your blog

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2022

Intel 4 Process Scales Logic with Design, Materials, and EUV original ↗

13 Jun 2022

2020

Transistor Count: A Flawed Metric original ↗

18 May 2020

Power Delivery in a Modern Processor original ↗

10 May 2020

2019

SuperComputing 19: HPC Meets Machine Learning original ↗

26 Nov 2019

2018

MRAM Research at VLSI 2018 original ↗

19 Nov 2018

IBM’s Machine Learning Accelerator at VLSI 2018 original ↗

9 Oct 2018

Intel’s Plans for 3DXP DIMMs Emerge original ↗

23 Jul 2018

Intel’s 22FFL Process Improves Power, Cost, and Analog original ↗

15 Jan 2018

2016

A Look Inside Apple’s Custom GPU for the iPhone original ↗

25 Oct 2016

Tile-based Rasterization in Nvidia GPUs original ↗

1 Aug 2016

2015

What’s Next for Moore’s Law? For Intel, III+V = 10nm QWFETs original ↗

21 Apr 2015

2014

Adaptive Clocking in AMD’s Steamroller original ↗

6 May 2014

AMD’s Jaguar Microarchitecture original ↗

1 Apr 2014

Splitting my time between MPR and RWT original ↗

10 Mar 2014

Knights Landing Details original ↗

3 Jan 2014

2013

Knights Landing CPU Speculation original ↗

18 Nov 2013

Silvermont, Intel’s Low Power Architecture original ↗

6 May 2013

Intel’s Long Awaited Return to the Memory Business original ↗

23 Apr 2013

Microservers must Specialize to Survive original ↗

28 Jan 2013

Lessons in Technology and Innovation from the iPad 3 Graphics and Display original ↗

1 Jan 2013

2012

Intel’s Haswell CPU Microarchitecture original ↗

13 Nov 2012

Intel’s Near-Threshold Voltage Computing and Applications original ↗

18 Sept 2012

Haswell Transactional Memory Alternatives original ↗

22 Aug 2012

ARM Goes 64-bit original ↗

14 Aug 2012

HP Wins Oracle Lawsuit original ↗

1 Aug 2012

Computational Efficiency for CPUs and GPUs in 2012 original ↗

25 Jul 2012

Behind RWT 3.0 original ↗

23 Jul 2012

Welcome to Real World Tech 3.0 original ↗

23 Jul 2012

Intel’s Ivy Bridge Graphics Architecture original ↗

22 Apr 2012

Sandy Bridge-EP Review original ↗

3 Apr 2012

Impressions of Kepler original ↗

22 Mar 2012

Sandy Bridge-EP Launches original ↗

6 Mar 2012

Analysis of Haswell’s Transactional Memory original ↗

15 Feb 2012

AMD’s Analyst Update original ↗

7 Feb 2012

Medfield, Intel’s x86 Phone Chip original ↗

23 Jan 2012

IBM z196 Mainframe Architecture original ↗

3 Jan 2012

2011

AMD’s Mobile Strategy original ↗

14 Dec 2011

ISSCC 2012 Preview original ↗

28 Nov 2011

Nvidia’s Kal-El Goes Asymmetric original ↗

5 Oct 2011

Llano at Hot Chips original ↗

31 Aug 2011

Intel’s Sandy Bridge Graphics Architecture original ↗

8 Aug 2011

Sandy Bridge for Servers original ↗

28 Jul 2011

Intel’s Quick Path Evolved original ↗

20 Jul 2011

AMD Fusion Architecture and Llano original ↗

27 Jun 2011

What Do Overclockers and Supercomputers Have in Common?original ↗

20 Jun 2011

Poulson: The Future of Itanium Servers original ↗

18 May 2011

Why Apple Won’t ARM the MacBook original ↗

9 May 2011

Intel’s 22nm Tri-Gate Transistors original ↗

5 May 2011

Memory Bandwidth and GPU Performance original ↗

26 Apr 2011

Sandy Bridge ISSCC Update original ↗

20 Apr 2011

Predicting AMD and Nvidia GPU Performance original ↗

11 Apr 2011

Sandy Bridge SPECcpu2006 Estimates original ↗

5 Apr 2011

Bulldozer Benchmarks, What Do They Mean?original ↗

30 Mar 2011

Building Clouds and Implications original ↗

21 Mar 2011

22nm Design Challenges at ISSCC 2011 original ↗

14 Mar 2011

IEDM 2010 Process Technology Update original ↗

15 Feb 2011

2010

AMD’s Cayman GPU Architecture original ↗

14 Dec 2010

Introduction to OpenCL original ↗

7 Dec 2010

New Itanium Microarchitecture at ISSCC 2011 original ↗

17 Nov 2010

Exploring the Intel and Achronix Deal original ↗

8 Nov 2010

Intel’s Sandy Bridge Microarchitecture original ↗

25 Sept 2010

AMD’s Bulldozer Microarchitecture original ↗

26 Aug 2010

Parallelism at HotPar 2010 original ↗

26 Jul 2010

PhysX87: Software Deficiency original ↗

5 Jul 2010

MAQSIP-RT: An HPC Benchmark original ↗

3 May 2010

Westmere Performance original ↗

25 Mar 2010

Westmere Arrives original ↗

17 Mar 2010

8-Socket Commodity Servers: Flourish or Perish?original ↗

8 Mar 2010

2009

NAND Flash: A Classic Disruptive Technology original ↗

30 Dec 2009

Larrabee 1 Defers Graphics, Bins Rendering original ↗

4 Dec 2009

Inside Fermi: Nvidia’s HPC Push original ↗

30 Sept 2009

Computational Efficiency in Modern Processors original ↗

9 Sept 2009

The Case for ECC Memory in Nvidia’s Next GPU original ↗

19 Aug 2009

Hot Chips XXI Preview original ↗

12 Aug 2009

Process Technology at IEDM 2008 original ↗

21 Jul 2009

Nehalem Performance Preview original ↗

7 Apr 2009

Tukwila Update original ↗

5 Feb 2009

2008

Performance Analysis for Core 2 and K8: Part 1 original ↗

28 Oct 2008

NVIDIA’s GT200: Inside a Parallel Processor original ↗

8 Sept 2008

A Look at SPECpower original ↗

12 May 2008

Inside Nehalem: Intel’s Future Processor and System original ↗

2 Apr 2008

ISSCC 2008 Cell Processor Update original ↗

25 Feb 2008

Process Technology Advancements at IEDM 2007 original ↗

16 Jan 2008

2007

ISSCC 2008 Preview: Silverthorne, Rock, Tukwila and More original ↗

5 Dec 2007

Rambus Sets the Bandwidth Bar at a Terabyte/Second original ↗

3 Dec 2007

Harpertown Performance Preview original ↗

9 Nov 2007

The Common System Interface: Intel’s Future Interconnect original ↗

28 Aug 2007

AMD’s Griffin Flies to the Fore original ↗

4 Jun 2007

Inside Barcelona: AMD’s Next Generation original ↗

16 May 2007

3D Integration: A Revolution in Design original ↗

2 May 2007

ISSCC 2007: Intel’s Teraflops Design original ↗

3 Apr 2007

ISSCC 2007: A Brief Survey original ↗

26 Mar 2007

Intel’s 45nm Surprise: High-k Dielectrics and Metal Gates original ↗

27 Jan 2007

2006

An Introduction to Multiprocessor Systems original ↗

11 Dec 2006

Clovertown Performance Preview: Rise of the Quad Core original ↗

14 Nov 2006

Performance Per Watt: Dempsey and Woodcrest original ↗

7 Nov 2006

Fall Processor Forum 2006: IBM’s POWER6 original ↗

16 Oct 2006

Niagara II: The Hydra Returns original ↗

4 Sept 2006

Performance Analysis Tools: A Look at VTune original ↗

6 Aug 2006

Notes on the Montecito Launch original ↗

25 Jul 2006