corpus.blog
41554 blogs · [ { "id": "01a0871e-1b44-7312-a5a5-c64ead1e4182", "title": "Plan9/Screencast", "url": "https://www.9lab.org/plan9/screencast/", "published_at": "2021-05-19T19:26:24+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eaddde4a9", "title": "Plan9/Remote Desktop", "url": "https://www.9lab.org/plan9/remote-desktop/", "published_at": "2021-05-08T22:51:13+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eadeb7bd4", "title": "Plan9/ThinkPad T420s", "url": "https://www.9lab.org/plan9/thinkpad-t420s/", "published_at": "2021-04-29T15:12:23+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eae9cbfc6", "title": "Plan9/Go", "url": "https://www.9lab.org/plan9/go/", "published_at": "2021-04-19T15:12:23+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eaefc3bbc", "title": "Links", "url": "https://www.9lab.org/links/", "published_at": "2021-04-19T06:20:22+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eaf9c1c8d", "title": "About", "url": "https://www.9lab.org/about/", "published_at": "2021-04-15T21:17:50+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb044851f", "title": "Plan9/Git9", "url": "https://www.9lab.org/plan9/git9/", "published_at": "2021-04-09T06:20:36+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb09191f3", "title": "Who Cares?!", "url": "https://www.9lab.org/who-cares/", "published_at": "2021-04-01T06:14:51+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb168816d", "title": "9Port/Acme with LSP", "url": "https://www.9lab.org/9port/acme-with-lsp/", "published_at": "2020-09-09T21:34:10+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb222c9c3", "title": "Pub/Fast and Correct Load Link/Store Conditional Instruction Handling in DBT Systems (CASES)", "url": "https://www.9lab.org/pub/fast-and-correct-load-link/store-conditional-instruction-handling-in-dbt-systems-cases/", "published_at": "2020-08-27T21:25:52+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb23525dd", "title": "Talk/ARC Processor Summit 2019", "url": "https://www.9lab.org/talk/arc-processor-summit-2019/", "published_at": "2019-09-19T12:29:49+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb32c7e4d", "title": "Pub/Mitigating JIT Compilation Latency in Virtual Execution Environments (VEE)", "url": "https://www.9lab.org/pub/mitigating-jit-compilation-latency-in-virtual-execution-environments-vee/", "published_at": "2019-04-14T21:25:52+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb3e59b43", "title": "Work/First Google and Now Facebook Use Our Concurrent JIT Compilation Scheme", "url": "https://www.9lab.org/work/first-google-and-now-facebook-use-our-concurrent-jit-compilation-scheme/", "published_at": "2017-05-19T12:47:21+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb420ef70", "title": "Work/Speed Accuracy Visibility Instruction Set Simulation Without Compromise!", "url": "https://www.9lab.org/work/speed-accuracy-visibility-instruction-set-simulation-without-compromise/", "published_at": "2017-04-27T13:00:39+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb430f514", "title": "Pub/Speeding up dynamic compilation: concurrent and parallel dynamic compilation (PhD)", "url": "https://www.9lab.org/pub/speeding-up-dynamic-compilation-concurrent-and-parallel-dynamic-compilation-phd/", "published_at": "2013-07-02T21:25:52+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb5170a78", "title": "Research/Industry and Research Impact of Pasta Project", "url": "https://www.9lab.org/research/industry-and-research-impact-of-pasta-project/", "published_at": "2012-12-01T13:16:41+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb5bb5610", "title": "Pub/A Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation (IJPP)", "url": "https://www.9lab.org/pub/a-parallel-dynamic-binary-translator-for-efficient-multi-core-simulation-ijpp/", "published_at": "2012-09-21T21:25:52+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb686f8ec", "title": "Talk/Euro LLVM Conference 2012", "url": "https://www.9lab.org/talk/euro-llvm-conference-2012/", "published_at": "2012-06-04T12:29:49+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb785b41d", "title": "Pub/Efficiently Parallelizing Instruction Set Simulation (LCTES)", "url": "https://www.9lab.org/pub/efficiently-parallelizing-instruction-set-simulation-lctes/", "published_at": "2012-05-01T21:25:52+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb79a60dd", "title": "Pub/Scalable Multi Core Simulation Using Parallel Dynamic Binary Translation (IC-SAMOS)", "url": "https://www.9lab.org/pub/scalable-multi-core-simulation-using-parallel-dynamic-binary-translation-ic-samos/", "published_at": "2011-10-17T21:25:52+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb7f90460", "title": "Pub/Generalized Just-In-Time Trace Compilation using a Parallel Task Farm in a Dynamic Binary Translator (PLDI)", "url": "https://www.9lab.org/pub/generalized-just-in-time-trace-compilation-using-a-parallel-task-farm-in-a-dynamic-binary-translator-pldi/", "published_at": "2011-06-21T21:25:52+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb81f3538", "title": "Pub/Cycle Accurate Performance Modelling (IC-SAMOS)", "url": "https://www.9lab.org/pub/cycle-accurate-performance-modelling-ic-samos/", "published_at": "2010-06-19T21:25:52+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb8280212", "title": "Pub/Integrated Instruction Selection and Register Allocation for Compact Code Generation (CGO)", "url": "https://www.9lab.org/pub/integrated-instruction-selection-and-register-allocation-for-compact-code-generation-cgo/", "published_at": "2010-04-01T21:25:52+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb83ae07b", "title": "Pub/Automatic Code Generation using Dynamic Programming Techniques (MSc)", "url": "https://www.9lab.org/pub/automatic-code-generation-using-dynamic-programming-techniques-msc/", "published_at": "2007-10-01T21:16:51+00:00" }, { "id": "01a0871e-1b44-7312-a5a5-c64eb88a2e37", "title": "Noam Chomsky/Rogue States", "url": "https://www.9lab.org/noam-chomsky/rogue-states/", "published_at": "1998-04-06T21:33:52+00:00" } ] posts Claim your blog
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9lab.org

9lab.org

2021

Plan9/Screencastoriginal ↗
19 May 2021
Plan9/Remote Desktoporiginal ↗
8 May 2021
Plan9/ThinkPad T420soriginal ↗
29 Apr 2021
Plan9/Gooriginal ↗
19 Apr 2021
Linksoriginal ↗
19 Apr 2021
Aboutoriginal ↗
15 Apr 2021
Plan9/Git9original ↗
9 Apr 2021
Who Cares?!original ↗
1 Apr 2021

2020

9Port/Acme with LSPoriginal ↗
9 Sept 2020
Pub/Fast and Correct Load Link/Store Conditional Instruction Handling in DBT Systems (CASES)original ↗
27 Aug 2020

2019

Talk/ARC Processor Summit 2019original ↗
19 Sept 2019
Pub/Mitigating JIT Compilation Latency in Virtual Execution Environments (VEE)original ↗
14 Apr 2019

2017

Work/First Google and Now Facebook Use Our Concurrent JIT Compilation Schemeoriginal ↗
19 May 2017
Work/Speed Accuracy Visibility Instruction Set Simulation Without Compromise!original ↗
27 Apr 2017

2013

Pub/Speeding up dynamic compilation: concurrent and parallel dynamic compilation (PhD)original ↗
2 Jul 2013

2012

Research/Industry and Research Impact of Pasta Projectoriginal ↗
1 Dec 2012
Pub/A Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation (IJPP)original ↗
21 Sept 2012
Talk/Euro LLVM Conference 2012original ↗
4 Jun 2012
Pub/Efficiently Parallelizing Instruction Set Simulation (LCTES)original ↗
1 May 2012

2011

Pub/Scalable Multi Core Simulation Using Parallel Dynamic Binary Translation (IC-SAMOS)original ↗
17 Oct 2011
Pub/Generalized Just-In-Time Trace Compilation using a Parallel Task Farm in a Dynamic Binary Translator (PLDI)original ↗
21 Jun 2011

2010

Pub/Cycle Accurate Performance Modelling (IC-SAMOS)original ↗
19 Jun 2010
Pub/Integrated Instruction Selection and Register Allocation for Compact Code Generation (CGO)original ↗
1 Apr 2010

2007

Pub/Automatic Code Generation using Dynamic Programming Techniques (MSc)original ↗
1 Oct 2007

1998

Noam Chomsky/Rogue Statesoriginal ↗
6 Apr 1998
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